This invention relates generally to integrated circuit (IC) processes and fabrication, and more particularly, a system and method for the low temperature cleaning of copper contaminants from an IC wafer which prevents the formation of copper oxides.
The demand for progressively smaller, less expensive, and more powerful electronic products, in turn, fuels the need for smaller geometry integrated circuits, and large substrates. It also creates a demand for a denser packaging of circuits onto IC substrates. The desire for smaller geometry IC circuits requires that the interconnects between components and through dielectric layers be as small as possible. Therefore, research continues into reducing the width of interconnects. The conductivity of the interconnects is reduced as the surface area of the interconnect is reduced, and the resulting increase in interconnect resistivity has become an obstacle in IC design. Conductors having high resistivity create conduction paths with high impedance and large propagation delays. These problems result in unreliable signal timing, unreliable voltage levels, and lengthy signal delays between components in the IC. Propagation discontinuities also result from intersecting conduction surfaces that are poorly connected, or from the joining of conductors having highly different impedance characteristics.
There is a need for interconnects to have both low resistivity, and the ability to withstand volatile process environments. Aluminum and tungsten metals are often used in the production of integrated circuits for making interconnects between electrically active areas. These metals are popular because they are easy to use in a production environment, unlike copper which requires special handling.
Copper (Cu) is a natural choice to replace aluminum in the effort to reduce the size of lines and vias in an electrical circuit. The conductivity of copper is approximately twice that of aluminum and over three times that of tungsten. As a result, the same current can be carried through a copper line having half the width of an aluminum line.
The electromigration characteristics of copper are also much superior to those of aluminum. Aluminum is approximately ten times more susceptible than copper to degradation and breakage through electromigration. As a result, a copper line, even one having a much smaller cross-section than an aluminum line, is better able to maintain electrical integrity.
There have been problems associated with the use of copper, however, in IC processing. Copper contaminates many of the materials used in IC processes and, therefore, care must be taken to keep copper from migrating. Various means have been suggested to deal with the problem of copper diffusion into integrated circuit material. Several materials, particularly refractory metals, have been suggested for use as barriers to prevent the copper diffusion process. Tungsten, molybdenum, and titanium nitride (TiN) are examples of refractory metals which may be suitable for use as copper diffusion barriers. However, the adhesion of copper to these diffusion barrier materials has been an IC process problem, and the electrical conductivity of such materials is an issue in building IC interconnects.
Metal cannot be deposited onto substrates, or into vias, using conventional metal deposition processes, such as sputtering, when the geometries of the selected IC features are small. It is impractical to sputter metal, either aluminum or copper, to fill small diameter vias, since the gap filling capability is poor. To deposit copper, various chemical vapor deposition (CVD) techniques are under development in the industry.
In a typical CVD process, copper is combined with an organic ligand to make a volatile copper compound or precursor. That is, copper is incorporated into a compound that is easily vaporized into a gas. Selected surfaces of an integrated circuit, such as diffusion barrier material, are exposed to the copper containing gas in an elevated temperature environment. When the volatile copper gas compound decomposes, copper is left behind on the heated selected surface. Several copper compounds are available for use with the CVD process.
Connections between metal levels, such as copper, which are separated by dielectric interlevels, are typically formed with a damascene method of via formation between metal levels. The underlying copper film is first completely covered with the dielectric. A typical dielectric is silicon dioxide. A patterned photoresist profile is then formed over the dielectric. The resist profile has an opening, or hole, in the photoresist corresponding to the area in the dielectric where the via is to be formed. Other areas of the dielectric to be left in place are covered with photoresist. The dielectric not covered with photoresist is then etched to remove oxide underlying the hole in the photoresist. The photoresist is then stripped away. A thin film of copper, or some other metallic material, is then used to fill the via. A layer consisting of dielectric with a copper interconnect through it now overlies the copper film. The excess copper remaining is removed with a chemical mechanical polish (CMP) process, as is well known in the art. The result is an "inlaid" or damascene structure.
Even when circuit structures are masked to prevent copper deposition, or undesired copper is removed in a CMP process, copper may remain on the edges and sides of the wafer where no ICs or circuits are located, as a result of CVD and CMP processes. Copper may migrate to neighboring active regions from the sides and edges of the wafer. Further, copper from a wafer edge may contaminate the wafer transport system, and so be passed on to contaminate other wafers. For this reason it is important to clean the wafers of copper residues following each copper process step. Plasma etching process using Cl and F have also been tried, but the heat generated and by-products have made such a method impractical.
A co-pending application, Ser. No. 08/717,315, filed Sep. 20, 1996, entitled, "Copper Adhered to a Diffusion Barrier Surface and Method for Same", invented by Lawrence J. Charneski and Tue Nguyen, Attorney Docket No. SMT 243, which is assigned to the same Assignees as the instant patent, discloses a method for using a variety of reactive gas species to improve copper adhesion without forming an oxide layer over the diffusion barrier. However, the focus of this patent is to improve copper adhesion, not to remove copper. In addition, the method of the above patent is generally only applicable to diffusion barrier material.
Another co-pending application, Ser. No. 08/729,567, filed Oct. 11, 1996, entitled, "Chemical Vapor Deposition of Copper on an ION Prepared Conductive Surface and Method for Same," invented by Nguyen and Maa, Attorney Docket No. 114, which is assigned to the same Assignees as the instant patent, discloses a method of preparing a conductive surface, such as copper, with an exposure to the ions of an inert gas to improve electrical conductivity between a conductive surface and a subsequent deposition of copper. However, the primary purpose of this invention is to prepare a conductive surface that is substantially free of by-products and IC process debris.
Another co-pending application, Ser. No. 08/861,808, filed May 22, 1997, entitled, "System and Method of Selectively Cleaning Copper Substrates Surfaces, In-Situ, to Remove Copper Oxides," invented by Nguyen et al., Attorney Docket No. 219, which is assigned to the same Assignees as the instant patent, discloses a method to remove copper oxides after they are formed, not to prevent the formation of copper oxides.
It would be advantageous to employ a method of cleaning a copper IC substrate surface while minimizing the formation of copper oxide products in the process.
It would be advantageous to employ a low temperature method of cleaning an IC substrate to selectively remove only copper, so that copper oxides are not given an opportunity to develop.
It would be advantageous if a selective copper cleaning process used a room temperature liquid etchant, and other easy to use IC materials, for the removal of copper. In this manner, the IC would not have to be removed from the chamber for cleaning and exposure to an oxygen atmosphere during the cleaning process.
Accordingly, in the fabrication of a semiconductor wafer having top and bottom surfaces, with a top surface edge, and a side along the top surface edge around the perimeter of the wafer surfaces, a low temperature method for removing copper from the wafer is provided. "Low temperature" means that the process is conducted at or near room temperature, with the etchant diluted enough to prevent a significant increase in temperature due to the energy of the reaction, and with photoresist baking accomplished at temperatures below 95.degree. C. These conditions discourage the oxidation of copper. In one embodiment of the invention, the etchant is nitric acid diluted to 30%.
Currently, the wafer has a 6 or 8 inch diameter. The thickness of the wafer around the perimeter provides a wafer side. This side and the adjoining surface edges require cleaning. The method comprises the steps of:
a) forming a layer of protective coating overlying selected areas the wafer top surface; and
b) applying a copper etchant solution to remove copper from portions of the wafer not covered by the protective coating.
Typically, the coating deposited in Step a) is patterned to cover the wafer top surface where the ICs are located. The protective coating is removed from the edges of the top surface and sides of the wafer. The protective coating selected from the group consisting of photoresist, photoresist without photo active compound (PAC), and spin-on glass (SOG). When Step a) includes forming a protective coating with photoresist, it is soft-baked at a temperature of 95.degree. C., or less, for a period of approximately 60 seconds, whereby the low temperature process prevents copper contaminants from oxidizing. When the circular wafer includes at least one straight top surface edge and side, such as the typical 6 inch wafer, Step a) includes depositing photoresist on the wafer top surface, exposing selected areas of the photoresist to light through a shadow-mask in close proximity to the wafer, to chemically alter the exposed photoresist. Then, the photoresist is developed and removed along the straight edge of the top surface.
Following Step b), are the steps of:
c) cleaning the wafer of copper etchant compounds with a de-ionized water rinse; and
d) etching the protective coating to completely remove protective coating from the wafer, whereby the wafer, free of copper contaminants, is available for further semiconductor processes.
Typically, the copper removal process uses a spin-etch processor chamber including a spin chuck and a copper etchant nozzle. Then, the method comprising the steps of:
a) rotating the wafer at a first revolution per minute (RPM) rate;
b) locating the nozzle above the top surface edge; and
c) applying a copper etchant to the top surface edge, whereby copper is removed from the exposed edges of the top surface and wafer sides.
In some aspects of the invention, a protective coating is not used in the copper etching process. In one process, the deposited copper has a first thickness overlying the edge and a second thickness overlying the copper interconnects toward the center of the disk, and Step c) removes the first thickness around the wafer edge. Then a step follows Step c), of:
d) performing a CMP to remove the second thickness of copper, revealing copper interconnects, whereby copper is removed without the use of a protective coating. In this manner, the deposition of the second thickness copper is used as the protective coating for the interconnects. In another alternate process, water is used as the protective coating. Step c.sub.2) includes locating a water nozzle approximately above the center of the wafer. Then, Steps c) and c.sub.2) are performed simultaneously, whereby the de-ionized water protects copper structures on the wafer top surface from damage from the copper etchant. Alternately, the process cycles between applying copper etchant and water.
When a photoresist protective coating is used, the method further comprises the steps, preceding Step a), of:
a.sub.1) depositing a protective coating, selective to the copper etchant used in Step c), on the top surface of the wafer;
a.sub.2) rotating the wafer and locating the second nozzle above the edge of the top surface; and
a.sub.3) applying a protective coating etchant with the second nozzle to remove the protective coating along the top surface edge and sides of the wafer.
A system for removing copper from a semiconductor wafer disk having top and bottom surfaces, with top surface edges and sides along the top surface edge around the perimeter of the wafer surfaces is also provided. The system comprises an enclosed chamber, a spin-chuck to rotate the mounted wafer, and a first solution application nozzle having at least one position approximately above the wafer perimeter edge to spray copper etchant, to remove copper from the sides and perimeter edge of the wafer. Some aspects of the invention further comprise a de-ionized water application nozzle having at least one position approximately above the center of the wafer, whereby the water is used to remove etchants and etchant compounds from the wafer.
Another nozzle, having at least one position approximately above the wafer edge perimeter, is used to spray a protective coating etchant upon the edge of the wafer top surface along the perimeter, whereby protective coating, masking copper interconnection structures on the wafer top surface, is removed on the edge of the top surface and the wafer sides before copper etchant is applied. The protective coating etchant nozzle is moveable in a plurality of positions between the wafer center and wafer perimeter, when the wafer is mounted on said chuck. This nozzle is moved between the wafer center and wafer perimeter to completely remove any protective coating remaining on the wafer after said first nozzle is used to remove copper from the wafer.